On 2024/12/05 18:50, Lucas Gabriel Vuotto wrote:
> On Sun, Dec 01, 2024 at 03:51:30AM -0500, Brad Smith wrote:
> > Here is an update to dav1d 1.5.0.
> > 
> > Upstream has created their own diffs to fix aarch64 for xonly and
> > works fine as is.
> > 
> > https://code.videolan.org/videolan/dav1d/-/commit/41511bf12ef3f7f0facf6e567849b342597bfbd6
> > https://code.videolan.org/videolan/dav1d/-/commit/2355eeb8f254a1c34dbb0241be5c70cdf6ed46d1
> > 
> > The amd64 patches for IBT need to be reapplied and updated. Could
> > someone with hardware to test and please be able to look into this?
> > 
> > Upstream seems to be open to accepting IBT patches if they're updated.
> 
> I have Intel IBT hardware. `make test` is happy, dav1dplay (in
> examples/) can display an IVF I found around internet and mpv is able to
> play AV1 media with this patch. The patch is 16k lines long, so it's
> compressed.

Looking alright so far on 12th gen.

cpu0 at mainbus0: apid 0 (boot processor)
cpu0: 12th Gen Intel(R) Core(TM) i5-1245U, 1580.59 MHz, 06-9a-04, patch 00000434
cpu0: cpuid 1 edx=bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> ecx=77fafbff<SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND>
cpu0: cpuid 6 eax=df8ff7<SENSOR,ARAT> ecx=409<EFFFREQ>
cpu0: cpuid 7.0 ebx=239c27eb<FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,RDSEED,ADX,SMAP,CLFLUSHOPT,CLWB,PT,SHA> ecx=98c027ac<UMIP,PKU,WAITPKG,PKS> edx=fc1cc410<MD_CLEAR,IBT,IBRS,IBPB,STIBP,L1DF,SSBD>
cpu0: cpuid a vers=5, gp=6, gpwidth=48, ff=3, ffwidth=48
cpu0: cpuid d.1 eax=f<XSAVEOPT,XSAVEC,XGETBV1,XSAVES>
cpu0: cpuid 80000001 edx=2c100800<NXE,PAGE1GB,RDTSCP,LONG> ecx=121<LAHF,ABM,3DNOWP>
cpu0: cpuid 80000007 edx=100<ITSC>
cpu0: msr 10a=1488fd6b<IBRS_ALL,SKIP_L1DFL,MDS_NO,IF_PSCHANGE,TAA_NO,MISC_PKG_CT,ENERGY_FILT,DOITM,SBDR_SSDP_N,FBSDP_NO,PSDP_NO,RRSBA,OVERCLOCK,GDS_NO,RFDS_CLEAR>
cpu0: 48KB 64b/line 12-way D-cache, 32KB 64b/line 8-way I-cache, 1MB 64b/line 10-way L2 cache, 12MB 64b/line 12-way L3 cache
cpu0: smt 0, core 0, package 0
cpu0: apic clock running at 38MHz
cpu0: mwait min=64, max=64, C-substates=0.2.0.2.0.1.0.1, IBE
acpicpu0 at acpi0: C3(200@1048 mwait.1@0x60), C2(350@127 mwait.1@0x21), C1(1000@1 mwait.1), PSS
cpu0: using VERW MDS workaround
cpu0: Enhanced SpeedStep 1580 MHz: speeds: 2501, 2500, 2300, 2200, 2000, 1900, 1600, 1500, 1400, 1300, 1000, 900, 800, 700, 500, 400 MHz