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UPDATE: QEMU 11.1.0
Here is an update to QEMU 11.1.0.
https://wiki.qemu.org/ChangeLog/11.1
Index: Makefile
===================================================================
RCS file: /cvs/ports/emulators/qemu/Makefile,v
retrieving revision 1.263
diff -u -p -u -p -r1.263 Makefile
--- Makefile 15 Jun 2026 00:26:21 -0000 1.263
+++ Makefile 12 Aug 2026 03:59:47 -0000
@@ -6,8 +6,7 @@ USE_NOBTCFI= Yes
COMMENT-main= multi system emulator
COMMENT-ga= QEMU guest agent
-VERSION= 11.0.1
-REVISION-main= 0
+VERSION= 11.1.0
DISTNAME= qemu-${VERSION}
CATEGORIES= emulators
SITES= https://download.qemu.org/
Index: distinfo
===================================================================
RCS file: /cvs/ports/emulators/qemu/distinfo,v
retrieving revision 1.87
diff -u -p -u -p -r1.87 distinfo
--- distinfo 29 May 2026 15:55:47 -0000 1.87
+++ distinfo 12 Aug 2026 03:59:47 -0000
@@ -1,2 +1,2 @@
-SHA256 (qemu-11.0.1.tar.xz) = DSNfWCAnjZFKMVXsJ6+OQljWl+qJKJVXCAfWnAy4zWQ=
-SIZE (qemu-11.0.1.tar.xz) = 141368572
+SHA256 (qemu-11.1.0.tar.xz) = buHRph9oISR2snEIwm2l9EncCbYm1C+CeboNwuCPqFg=
+SIZE (qemu-11.1.0.tar.xz) = 141831772
Index: patches/patch-hw_ppc_pnv_psi_c
===================================================================
RCS file: /cvs/ports/emulators/qemu/patches/patch-hw_ppc_pnv_psi_c,v
retrieving revision 1.1
diff -u -p -u -p -r1.1 patch-hw_ppc_pnv_psi_c
--- patches/patch-hw_ppc_pnv_psi_c 15 Jun 2026 00:26:21 -0000 1.1
+++ patches/patch-hw_ppc_pnv_psi_c 12 Aug 2026 03:59:47 -0000
@@ -1,4 +1,4 @@
-https://marc.info/?l=qemu-devel&m=178097910779871&w=2
+https://marc.info/?l=qemu-devel&m=178447293031762&w=2
Index: hw/ppc/pnv_psi.c
--- hw/ppc/pnv_psi.c.orig
@@ -12,18 +12,17 @@ Index: hw/ppc/pnv_psi.c
val = psi->regs[reg];
break;
default:
-@@ -817,18 +819,15 @@ static const MemoryRegionOps pnv_psi_p9_xscom_ops = {
- static void pnv_psi_power9_set_irq(void *opaque, int irq, int state)
+@@ -818,17 +820,20 @@ static void pnv_psi_power9_set_irq(void *opaque, int i
{
PnvPsi *psi = opaque;
-- uint64_t irq_method = psi->regs[PSIHB_REG(PSIHB9_INTERRUPT_CONTROL)];
+ uint64_t irq_method = psi->regs[PSIHB_REG(PSIHB9_INTERRUPT_CONTROL)];
+ uint64_t irq_bit = PPC_BIT(irq);
-- if (irq_method & PSIHB9_IRQ_METHOD) {
-- qemu_log_mask(LOG_GUEST_ERROR, "PSI: LSI IRQ method no supported\n");
-- return;
-- }
--
+ if (irq_method & PSIHB9_IRQ_METHOD) {
+ qemu_log_mask(LOG_GUEST_ERROR, "PSI: LSI IRQ method no supported\n");
+ return;
+ }
+
- /* Update LSI levels */
+ /* Update LSI levels and pending status */
if (state) {
Index: patches/patch-meson_build
===================================================================
RCS file: /cvs/ports/emulators/qemu/patches/patch-meson_build,v
retrieving revision 1.21
diff -u -p -u -p -r1.21 patch-meson_build
--- patches/patch-meson_build 29 May 2026 15:55:47 -0000 1.21
+++ patches/patch-meson_build 12 Aug 2026 03:59:47 -0000
@@ -4,7 +4,7 @@
Index: meson.build
--- meson.build.orig
+++ meson.build
-@@ -2406,7 +2406,7 @@ config_host_data.set('CONFIG_QEMU_FIRMWAREPATH', qemu_
+@@ -2387,7 +2387,7 @@ config_host_data.set('CONFIG_QEMU_FIRMWAREPATH', qemu_
config_host_data.set_quoted('CONFIG_QEMU_HELPERDIR', get_option('prefix') / get_option('libexecdir'))
config_host_data.set_quoted('CONFIG_QEMU_ICONDIR', get_option('prefix') / qemu_icondir)
config_host_data.set_quoted('CONFIG_QEMU_LOCALEDIR', get_option('prefix') / get_option('localedir'))
@@ -13,7 +13,7 @@ Index: meson.build
config_host_data.set_quoted('CONFIG_QEMU_MODDIR', get_option('prefix') / qemu_moddir)
config_host_data.set_quoted('CONFIG_SYSCONFDIR', get_option('prefix') / get_option('sysconfdir'))
-@@ -4747,9 +4747,6 @@ if have_rust
+@@ -4748,9 +4748,6 @@ if have_rust
summary_info += {'bindgen version': bindgen.version()}
endif
option_cflags = (get_option('debug') ? ['-g'] : [])
Index: patches/patch-target_i386_tcg_emit_c_inc
===================================================================
RCS file: patches/patch-target_i386_tcg_emit_c_inc
diff -N patches/patch-target_i386_tcg_emit_c_inc
--- patches/patch-target_i386_tcg_emit_c_inc 15 Jun 2026 00:26:21 -0000 1.1
+++ /dev/null 1 Jan 1970 00:00:00 -0000
@@ -1,22 +0,0 @@
-https://marc.info/?l=qemu-devel&m=178096490372293&w=2
-
-Index: target/i386/tcg/emit.c.inc
---- target/i386/tcg/emit.c.inc.orig
-+++ target/i386/tcg/emit.c.inc
-@@ -3768,10 +3768,13 @@ static void gen_SAHF(DisasContext *s, X86DecodedInsn *
- return gen_illegal_opcode(s);
- }
- tcg_gen_shri_tl(s->T0, cpu_regs[R_EAX], 8);
-- gen_neg_setcc(s, JCC_O << 1, cpu_cc_src);
-- tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
-+ gen_neg_setcc(s, JCC_O << 1, s->T1);
-+ tcg_gen_andi_tl(s->T1, s->T1, CC_O);
- tcg_gen_andi_tl(s->T0, s->T0, CC_S | CC_Z | CC_A | CC_P | CC_C);
-- tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, s->T0);
-+ tcg_gen_or_tl(s->T0, s->T0, s->T1);
-+
-+ decode->cc_src = s->T0;
-+ decode->cc_op = CC_OP_EFLAGS;
- }
-
- static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)
Index: patches/patch-target_ppc_mmu-book3s-v3_c
===================================================================
RCS file: /cvs/ports/emulators/qemu/patches/patch-target_ppc_mmu-book3s-v3_c,v
retrieving revision 1.1
diff -u -p -u -p -r1.1 patch-target_ppc_mmu-book3s-v3_c
--- patches/patch-target_ppc_mmu-book3s-v3_c 15 Jun 2026 00:26:21 -0000 1.1
+++ patches/patch-target_ppc_mmu-book3s-v3_c 12 Aug 2026 03:59:47 -0000
@@ -1,21 +1,30 @@
-https://marc.info/?l=qemu-devel&m=178097910779871&w=2
+https://marc.info/?l=qemu-devel&m=178447293031762&w=2
Index: target/ppc/mmu-book3s-v3.c
--- target/ppc/mmu-book3s-v3.c.orig
+++ target/ppc/mmu-book3s-v3.c
-@@ -23,19 +23,21 @@
+@@ -23,24 +23,37 @@
#include "mmu-hash64.h"
#include "mmu-book3s-v3.h"
--bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
-+static bool ppc64_v3_get_pate_from_size(PowerPCCPU *cpu, target_ulong lpid,
-+ ppc_v3_pate_t *entry,
-+ uint64_t table_size)
++#define PPC64_V3_PATE_SIZE 16 /* two 64-bit words */
++
+ bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
{
uint64_t patb = cpu->env.spr[SPR_PTCR] & PTCR_PATB;
-- uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS;
+ uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS;
++ uint64_t table_size;
+ uint64_t entries;
++ /*
++ * The POWER9 Processor User's Manual, section 4.9.4, specifies that
++ * POWER9 ignores PTCR[PATS] and only supports a 64 KiB partition table.
++ */
++ if (cpu->env.excp_model == POWERPC_EXCP_POWER9) {
++ pats = 4;
++ }
++ table_size = 1ULL << (pats + 12);
++
/* Check if partition table is properly aligned */
- if (patb & MAKE_64BIT_MASK(0, pats + 12)) {
+ if (patb & (table_size - 1)) {
@@ -25,34 +34,14 @@ Index: target/ppc/mmu-book3s-v3.c
/* Calculate number of entries */
- pats = 1ull << (pats + 12 - 4);
- if (pats <= lpid) {
-+ entries = table_size / sizeof(*entry);
++ entries = table_size / PPC64_V3_PATE_SIZE;
+ if (entries <= lpid) {
return false;
}
-@@ -44,4 +46,25 @@ bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong l
+ /* Grab entry */
+- patb += 16 * lpid;
++ patb += PPC64_V3_PATE_SIZE * lpid;
entry->dw0 = ldq_phys(CPU(cpu)->as, patb);
entry->dw1 = ldq_phys(CPU(cpu)->as, patb + 8);
return true;
-+}
-+
-+bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
-+{
-+ uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS;
-+
-+ /*
-+ * Keep the existing ISA v3.0 PATS interpretation first. OpenBSD/powernv
-+ * uses the PATSIZE value it writes to PTCR as one exponent smaller, and it
-+ * only needs that interpretation for the bare metal LPID 0 table.
-+ */
-+ if (ppc64_v3_get_pate_from_size(cpu, lpid, entry, 1ull << (pats + 12))) {
-+ return true;
-+ }
-+
-+ if (lpid == 0) {
-+ return ppc64_v3_get_pate_from_size(cpu, lpid, entry,
-+ 1ull << (pats + 11));
-+ }
-+
-+ return false;
- }
Index: patches/patch-tests_qtest_meson_build
===================================================================
RCS file: /cvs/ports/emulators/qemu/patches/patch-tests_qtest_meson_build,v
retrieving revision 1.4
diff -u -p -u -p -r1.4 patch-tests_qtest_meson_build
--- patches/patch-tests_qtest_meson_build 29 May 2026 15:55:47 -0000 1.4
+++ patches/patch-tests_qtest_meson_build 12 Aug 2026 03:59:47 -0000
@@ -1,7 +1,7 @@
Index: tests/qtest/meson.build
--- tests/qtest/meson.build.orig
+++ tests/qtest/meson.build
-@@ -405,14 +405,6 @@ qtests = {
+@@ -418,23 +418,6 @@ qtests = {
'netdev-socket': files('netdev-socket.c', '../unit/socket-helpers.c'),
}
@@ -10,6 +10,15 @@ Index: tests/qtest/meson.build
- if gvnc.found()
- qtests += {'vnc-display-test': [gvnc, keymap_targets]}
- qtests_generic += [ 'vnc-display-test' ]
+- if have_qemu_vnc and dbus_display and config_all_devices.has_key('CONFIG_VGA')
+- dbus_vnc_test_deps = [dbus_display1, qemu_vnc1, gio, gvnc, keymap_targets]
+- if gnutls.found() and tasn1.found()
+- dbus_vnc_test_deps += [files('../unit/crypto-tls-x509-helpers.c'),
+- gnutls, tasn1]
+- endif
+- qtests += {'dbus-vnc-test': dbus_vnc_test_deps}
+- qtests_x86_64 += ['dbus-vnc-test']
+- endif
- endif
-endif
-
Index: pkg/PLIST-main
===================================================================
RCS file: /cvs/ports/emulators/qemu/pkg/PLIST-main,v
retrieving revision 1.26
diff -u -p -u -p -r1.26 PLIST-main
--- pkg/PLIST-main 29 May 2026 15:55:47 -0000 1.26
+++ pkg/PLIST-main 12 Aug 2026 03:59:47 -0000
@@ -10,6 +10,7 @@
@bin bin/qemu-system-alpha
@bin bin/qemu-system-arm
@bin bin/qemu-system-avr
+@bin bin/qemu-system-hexagon
@bin bin/qemu-system-hppa
@bin bin/qemu-system-i386
@bin bin/qemu-system-loongarch64
@@ -36,6 +37,7 @@
@bin bin/qemu-system-xtensaeb
@man man/man1/qemu-img.1
@man man/man1/qemu-storage-daemon.1
+@man man/man1/qemu-vnc.1
@man man/man1/qemu.1
@man man/man7/qemu-block-drivers.7
@man man/man7/qemu-cpu-models.7
@@ -115,6 +117,7 @@ share/doc/qemu/devel/crypto.html
share/doc/qemu/devel/decodetree.html
share/doc/qemu/devel/docs.html
share/doc/qemu/devel/ebpf_rss.html
+share/doc/qemu/devel/hexagon-sys.html
share/doc/qemu/devel/index-api.html
share/doc/qemu/devel/index-build.html
share/doc/qemu/devel/index-internals.html
@@ -160,6 +163,7 @@ share/doc/qemu/devel/rust.html
share/doc/qemu/devel/s390-cpu-topology.html
share/doc/qemu/devel/s390-dasd-ipl.html
share/doc/qemu/devel/secure-coding-practices.html
+share/doc/qemu/devel/ssi.html
share/doc/qemu/devel/stable-process.html
share/doc/qemu/devel/style.html
share/doc/qemu/devel/submitting-a-patch.html
@@ -184,6 +188,7 @@ share/doc/qemu/devel/trivial-patches.htm
share/doc/qemu/devel/uefi-vars.html
share/doc/qemu/devel/ui.html
share/doc/qemu/devel/vfio-iommufd.html
+share/doc/qemu/devel/vfio-mdpy.html
share/doc/qemu/devel/virtio-backends.html
share/doc/qemu/devel/writing-monitor-commands.html
share/doc/qemu/devel/zoned-storage.html
@@ -194,6 +199,7 @@ share/doc/qemu/interop/barrier.html
share/doc/qemu/interop/bitmaps.html
share/doc/qemu/interop/dbus-display.html
share/doc/qemu/interop/dbus-vmstate.html
+share/doc/qemu/interop/dbus-vnc.html
share/doc/qemu/interop/dbus.html
share/doc/qemu/interop/index.html
share/doc/qemu/interop/live-block-operations.html
@@ -267,9 +273,8 @@ share/doc/qemu/system/arm/digic.html
share/doc/qemu/system/arm/emcraft-sf2.html
share/doc/qemu/system/arm/emulation.html
share/doc/qemu/system/arm/exynos.html
-share/doc/qemu/system/arm/fby35.html
share/doc/qemu/system/arm/imx25-pdk.html
-share/doc/qemu/system/arm/imx8mp-evk.html
+share/doc/qemu/system/arm/imx8m.html
share/doc/qemu/system/arm/integratorcp.html
share/doc/qemu/system/arm/kzm.html
share/doc/qemu/system/arm/max78000.html
@@ -330,6 +335,9 @@ share/doc/qemu/system/devices/virtio/vir
share/doc/qemu/system/gdb.html
share/doc/qemu/system/generic-loader.html
share/doc/qemu/system/guest-loader.html
+share/doc/qemu/system/hexagon/
+share/doc/qemu/system/hexagon/cdsp.html
+share/doc/qemu/system/hexagon/emulation.html
share/doc/qemu/system/i386/
share/doc/qemu/system/i386/amd-memory-encryption.html
share/doc/qemu/system/i386/cpu.html
@@ -376,11 +384,13 @@ share/doc/qemu/system/qemu-cpu-models.ht
share/doc/qemu/system/qemu-manpage.html
share/doc/qemu/system/replay.html
share/doc/qemu/system/riscv/
+share/doc/qemu/system/riscv/k230.html
share/doc/qemu/system/riscv/microblaze-v-generic.html
share/doc/qemu/system/riscv/microchip-icicle-kit.html
share/doc/qemu/system/riscv/mips.html
share/doc/qemu/system/riscv/shakti-c.html
share/doc/qemu/system/riscv/sifive_u.html
+share/doc/qemu/system/riscv/tt_atlantis.html
share/doc/qemu/system/riscv/virt.html
share/doc/qemu/system/riscv/xiangshan-kunminghu.html
share/doc/qemu/system/s390x/
@@ -397,6 +407,7 @@ share/doc/qemu/system/security.html
share/doc/qemu/system/sriov.html
share/doc/qemu/system/target-arm.html
share/doc/qemu/system/target-avr.html
+share/doc/qemu/system/target-hexagon.html
share/doc/qemu/system/target-i386.html
share/doc/qemu/system/target-loongarch.html
share/doc/qemu/system/target-m68k.html
@@ -423,6 +434,7 @@ share/doc/qemu/tools/qemu-pr-helper.html
share/doc/qemu/tools/qemu-storage-daemon.html
share/doc/qemu/tools/qemu-trace-stap.html
share/doc/qemu/tools/qemu-vmsr-helper.html
+share/doc/qemu/tools/qemu-vnc.html
share/doc/qemu/user/
share/doc/qemu/user/index.html
share/doc/qemu/user/main.html
UPDATE: QEMU 11.1.0