From: Stuart Henderson <stu@spacehopper.org>
Subject: Re: FPGA related port 4/4: Update cad/yosys 0.9 -> 0.67
To: Thomas Dettbarn <dettus@dettus.net>
Cc: ports@openbsd.org
Date: Thu, 23 Jul 2026 10:31:59 +0100

On 2026/07/17 15:22, Thomas Dettbarn wrote:
> Hello.
> 
> A couple of days ago, yosys 0.67 was release, so I took the liberty to
> update my collection of ports related to FPGA design.
> Please find my latest update to my port for cad/yosys attached
> to this email.
> 
> (I attached it in two different formats: As a .tgz as well as a diff to the
> github repository.)

just a diff is preferred for an update.

> +--- CMakeLists.txt.orig
> ++++ CMakeLists.txt
> +@@ -53,7 +53,7 @@ option(YOSYS_WITHOUT_ZLIB "Disable zlib integration" O
> + option(YOSYS_WITHOUT_LIBFFI "Disable libffi integration" OFF)
> + option(YOSYS_WITHOUT_READLINE "Disable readline integration" OFF)
> + option(YOSYS_WITHOUT_EDITLINE "Disable editline integration" OFF)
> +-option(YOSYS_WITHOUT_SLANG "Disable Slang integration" OFF)
> ++option(YOSYS_WITHOUT_SLANG "Disable Slang integration" ON)

don't patch CMakeLists.txt for this, set in CONFIGURE_ARGS
-DYOSYS_WITHOUT_SLANG=On

> +++ b/cad/yosys/patches/patch-cmake_FindBISON_cmake
> @@ -0,0 +1,13 @@
> +Index: cmake/FindBISON.cmake
> +--- cmake/FindBISON.cmake.orig
> ++++ cmake/FindBISON.cmake
> +@@ -315,7 +315,8 @@ if(BISON_EXECUTABLE)
> +       unset(_BISON_CMP0088)
> + 
> +       add_custom_command(OUTPUT ${BISON_TARGET_outputs}
> +-        COMMAND ${CMAKE_COMMAND} -E env "M4=${BISON_M4_EXECUTABLE}"
> ++#        COMMAND ${CMAKE_COMMAND} -E env "M4=${BISON_M4_EXECUTABLE}"
> ++        COMMAND ${CMAKE_COMMAND} -E env "HOTFIXM4=${BISON_M4_EXECUTABLE}"
> +           ${BISON_EXECUTABLE} ${BISON_TARGET_cmdopt} -o ${BisonOutput} ${_BisonInput}
> +         VERBATIM
> +         DEPENDS ${_BisonInput}

what is this for?

> diff --git a/cad/yosys/patches/patch-frontends_slang_CMakeLists_txt b/cad/yosys/patches/patch-frontends_slang_CMakeLists_txt
> new file mode 100644
> index 00000000000..007841de6f6
> --- /dev/null
> +++ b/cad/yosys/patches/patch-frontends_slang_CMakeLists_txt
> @@ -0,0 +1,11 @@
> +Index: frontends/slang/CMakeLists.txt
> +--- frontends/slang/CMakeLists.txt.orig
> ++++ frontends/slang/CMakeLists.txt
> +@@ -2,6 +2,7 @@ include(lib/cmake/GitRevision.cmake)
> + git_rev_parse(YOSYS_SLANG_REVISION ${CMAKE_CURRENT_SOURCE_DIR}/lib)
> + git_rev_parse(SLANG_REVISION ${PROJECT_SOURCE_DIR}/libs/slang)
> + configure_file(${CMAKE_CURRENT_SOURCE_DIR}/lib/src/version.h.in ${CMAKE_CURRENT_BINARY_DIR}/version.h)
> ++add_compile_definitions(FMT_DEPRECATED_HEAVY_CORE)

can you do this with e.g. CXXFLAGS += -DFMT_DEPRECATED_HEAVY_CORE
instead of patching multiple files?

> --- a/cad/yosys/pkg/DESCR
> +++ b/cad/yosys/pkg/DESCR
> @@ -1,16 +1,15 @@
> -Yosys Open SYnthesis Suite
> +This is a framework for RTL synthesis tools. It currently has extensive 
> +Verilog-2005 support and provides a basic set of synthesis algorithms for 
> +various application domains.
>  
> -Yosys is a framework for Verilog RTL synthesis. It currently has extensive
> -Verilog-2005 support and provides a basic set of synthesis algorithms for
> -various application domains. Selected features and typical applications:
> +Yosys can be adapted to perform any synthesis job by combining the existing 
> +passes (algorithms) using synthesis scripts and adding additional passes as 
> +needed by extending the yosys C++ code base.

trailing whitespace

>  
> -- Process almost any synthesizable Verilog-2005 design
> -- Converting Verilog to BLIF / EDIF/ BTOR / SMT-LIB / simple RTL Verilog / etc.
> -- Built-in formal methods for checking properties and equivalence
> -- Mapping to ASIC standard cell libraries (in Liberty File Format)
> -- Mapping to Xilinx 7-Series and Lattice iCE40 FPGAs
> -- Foundation and/or front-end for custom flows
> +Yosys is free software licensed under the ISC license (a GPL compatible 
> +license that is similar in terms to the MIT license or the 2-clause BSD 
> +license).
>  
> -Yosys can be adapted to perform any synthesis job by combining the existing
> -passes (algorithms) using synthesis scripts and adding additional passes as
> -needed by extending the Yosys C++ code base.
> +Third-party software distributed alongside this software is licensed under 
> +compatible licenses. Please refer to abc and libs subdirectories for their 
> +license terms.

drop the license info from DESCR